{"id":20807,"date":"2023-12-07T16:11:56","date_gmt":"2023-12-07T08:11:56","guid":{"rendered":"https:\/\/www.circuspi.com\/?p=20807"},"modified":"2023-12-07T16:11:58","modified_gmt":"2023-12-07T08:11:58","slug":"esp32-spi-introduction","status":"publish","type":"post","link":"https:\/\/www.circuspi.com\/index.php\/2023\/12\/07\/esp32-spi-introduction\/","title":{"rendered":"ESP32\u6559\u5b78\u7cfb\u5217(\u516b)\uff1a\u5e8f\u5217\u5468\u908a\u4ecb\u9762(SPI)"},"content":{"rendered":"\n
\"\"<\/figure>\n\n\n\n

\u524d\u8a00<\/h2>\n\n\n\n

\u9019\u6b21\u6211\u5011\u8981\u4ecb\u7d39\u7684\u4e3b\u984c\u662fSPI\u901a\u8a0a\u754c\u9762\u3002\u4e00\u822c\u5728\u4f7f\u7528SPI\u4ecb\u9762\u50b3\u8f38\u7684\u611f\u6e2c\u5668\u6216\u88dd\u7f6e\u6642\uff0c\u901a\u5e38\u9084\u6703\u518d\u53e6\u5916\u642d\u914d\u5176\u4ed6\u51fd\u5f0f\u5eab\uff0c\u8207ESP32\u539f\u751f\u7684SPI\u95dc\u9023\u4e0d\u5927\uff0c\u6709\u95dc\u5be6\u969b\u61c9\u7528\u7684\u5167\u5bb9\u6211\u5011\u6703\u7559\u5230\u4e0b\u4e00\u7bc7\u518d\u9032\u884c\u8aaa\u660e\u3002\u9019\u7bc7\u6587\u7ae0\u5c07\u4ecb\u7d39\u5982\u4f55\u4f7f\u7528ESP32\u7684SPI\uff0c\u4e26\u4e14\u8aaa\u660e\u5982\u4f55\u5728\u5169\u7247ESP32\u958b\u767c\u677f\u4e4b\u9593\u4f7f\u7528SPI\u901a\u8a0a\u3002<\/p>\n\n\n\n

<\/p>\n\n\n\n

\u4ec0\u9ebc\u662fSPI\uff1f<\/h2>\n\n\n\n

\u5e8f\u5217\u5468\u908a\u4ecb\u9762\uff08Serial Peripheral Interface\uff0c SPI\uff09\uff0c\u662f\u5fae\u63a7\u5236\u5668\u5e38\u7528\u7684\u4e00\u7a2e\u5168\u96d9\u5de5\u4e32\u5217\u540c\u6b65\u901a\u8a0a\u754c\u9762\uff0c\u9069\u7528\u65bc\u8207\u5468\u908a\u8a2d\u5099\u9032\u884c\u77ed\u8ddd\u96e2\u4e14\u9ad8\u901f\u7684\u50b3\u8f38\u3002\u5b83\u63a1\u7528\u4e86\u4e3b\u5f9e\u5f0f\u67b6\u69cb\uff0c\u7531\u4e00\u500b\u4e3b\u8a2d\u5099\u548c\u4e00\u81f3\u591a\u500b\u5468\u908a\u8a2d\u5099\u7d44\u6210\uff0c\u6700\u65e9\u7531\u6469\u6258\u7f85\u62c9\uff08Motorola\uff09\u516c\u53f8\u57281980\u5e74\u4ee3\u4e2d\u671f\u958b\u767c\u3002<\/p>\n\n\n\n

\u5728Flash\uff08\u5feb\u9583\u8a18\u61b6\u9ad4\uff09\u3001EEPROM\u3001RTC\uff08\u5be6\u6642\u6642\u9418\uff09\u3001ADC\uff08\u985e\u6bd4\u6578\u4f4d\u8f49\u63db\u5668\uff09\u3001DAC\uff08\u6578\u4f4d\u985e\u6bd4\u8f49\u63db\u5668\uff09\u3001\u6db2\u6676\u986f\u793a\u5668\uff0c\u6216\u662f\u5169\u500b\u5fae\u63a7\u5236\u5668\u9593\u7684\u901a\u8a0a\u90fd\u53ef\u4ee5\u770b\u5230SPI\u7684\u61c9\u7528\u3002\u4f46\u7531\u65bcSPI\u4e0d\u662f\u4e00\u5957\u5177\u6709\u6a19\u6e96\u898f\u7bc4\u7684\u5354\u8b70\uff0c\u5b83\u53ea\u662f\u4e00\u7a2e\u696d\u754c\u6a19\u6e96\uff08de facto standard\uff09\uff0c\u6240\u4ee5\u4e0d\u662f\u6bcf\u500b\u4f7f\u7528SPI\u7684\u8a2d\u5099\u90fd\u7528\u76f8\u540c\u7684\u65b9\u5f0f\u5be6\u73fe\u3002<\/p>\n\n\n\n

\ud83d\udca1Tips:<\/span> \u904e\u53bb SPI \u5e38\u4ee5 Master \u8207 Slave \u7a31\u547c\u4e3b\u5f9e\u7aef\u7684\u8a2d\u5099\uff0c\u4f46\u662f\u958b\u6e90\u786c\u9ad4\u806f\u76df\uff08Open Source Hardware Association, OSHWA\uff09\u5728A Resolution to Redefine SPI Signal Names<\/span><\/a>\u9019\u7bc7\u6587\u7ae0\u4e2d\u5efa\u8b70\u61c9\u8a72\u4f7f\u7528\u65b0\u7684\u547d\u540d\u65b9\u5f0f\uff0c\u4ee5 Controller \u4ee3\u66ff Master<\/span>\uff0cPeripheral \u4ee3\u66ffSlave<\/span>\uff0cSCK\uff08Serial Clock\uff09\u7684\u7a31\u547c\u7dad\u6301\u4e0d\u8b8a\u3002<\/p><\/blockquote><\/figure>\n\n\n\n

\u65b0\u820a\u63a5\u8173\u540d\u7a31\u5c0d\u7167\uff1a<\/p>\n\n\n\n

\u63a5\u8173\u540d\u7a31\uff08\u820a\uff09<\/th>\u63a5\u8173\u540d\u7a31\uff08\u65b0\uff09<\/th><\/tr><\/thead>
MISO (Master In Slave Out)<\/td>CIPO (Controller In Peripheral Out)<\/td><\/tr>
MOSI (Master Out Slave In)<\/td>COPI (Controller Out Peripheral In)<\/td><\/tr>
SS (Slave Select Pin)<\/td>CS (Chip Select Pin)<\/td><\/tr><\/tbody><\/table><\/figure>\n\n\n\n

SPI\u901a\u8a0a\u63a1\u7528\u4e3b\u5f9e\u5f0f\u67b6\u69cb\uff0c\u7531\u4e3b\u8a2d\u5099\u767c\u8d77\u50b3\u8f38\u8a0a\u865f\uff0c\u7d71\u4e00\u63a7\u5236\u6240\u6709\u88dd\u7f6e\u50b3\u8f38\uff0c\u4e26\u63a7\u5236\u8a2d\u5099\u8207\u8a2d\u5099\u4e4b\u9593\u767c\u9001\u548c\u8b80\u53d6\u8cc7\u6599\u7684\u6642\u6a5f\u3002\u6240\u6709\u8a2d\u5099\u90fd\u5171\u4eab\u540c\u4e00\u500b\u7531\u4e3b\u8a2d\u5099\u63d0\u4f9b\u7684\u6642\u8108(clock)\u8a0a\u865f\u3002<\/p>\n\n\n\n

\"\"
SPI \u532f\u6d41\u6392\u3002\uff08\u5716\u7247\u53d6\u81ea\u7dad\u57fa\u767e\u79d1<\/a>\uff09<\/figcaption><\/figure>\n\n\n\n

\u4e00\u822cSPI\u6703\u67094\u689d\u8cc7\u6599\u7dda\uff0c\u5206\u5225\u662f\uff1a<\/p>\n\n\n\n

    \n
  • CIPO\/MISO: \u5468\u908a\u88dd\u7f6e\u8f38\u51fa\u8cc7\u6599\u5230\u63a7\u5236\u5668\u3002<\/li>\n\n\n\n
  • COPI\/MOSI: \u63a7\u5236\u5668\u8f38\u51fa\u8cc7\u6599\u5230\u5468\u908a\u88dd\u7f6e\u3002<\/li>\n\n\n\n
  • SCK\/SCLK\uff08Serial Clock\uff09: \u4e32\u5217\u6642\u8108\uff0c\u7531\u4e3b\u8a2d\u5099\u767c\u51fa\u3002\u6642\u8108\u901f\u5ea6\u4e5f\u6c7a\u5b9a\u4e86\u50b3\u8f38\u901f\u5ea6\u3002<\/li>\n\n\n\n
  • CS\/SS: \u6676\u7247\u9078\u64c7\u63a5\u8173\uff0c\u4f4e\u96fb\u4f4d\u9a45\u52d5\u3002\u7576\u540c\u4e00\u689dSPI Bus\u4e0a\u6709\u591a\u500b\u8a2d\u5099\u6642\uff0c\u4e3b\u8a2d\u5099\u6703\u7528CS\u63a5\u8173\u9078\u64c7\u8981\u9032\u884c\u901a\u8a0a\u7684\u5468\u908a\u8a2d\u5099\u3002<\/li>\n<\/ul>\n\n\n\n

    <\/p>\n\n\n\n

    SPI\u6a21\u5f0f<\/h3>\n\n\n\n

    \u7576\u8a2d\u5099\u50b3\u9001\u8cc7\u6599\u6642\uff0c\u5728\u4ec0\u9ebc\u6642\u9593\u9ede\u8b80\u53d6\u8a0a\u865f\uff0c\u6703\u76f4\u63a5\u7684\u5f71\u97ff\u8a2d\u5099\u4e4b\u9593\u7684\u901a\u8a0a\u5167\u5bb9\u3002\u901a\u5e38\u5728SPI\u4e2d\uff0c\u6703\u4ee5\u6a21\u5f0f\uff08Mode\uff09\u4f86\u5b9a\u7fa9\u3002\u6a21\u5f0f\u7531\u5169\u500b\u689d\u4ef6\u69cb\u6210\uff1a\u6642\u8108\u76f8\u4f4d\uff08clock phase\uff09\u8207\u6642\u8108\u6975\u6027\uff08clock polarity\uff09\u3002<\/p>\n\n\n\n

      \n
    • \u6642\u8108\u76f8\u4f4d\uff08CPHA\uff09\uff1a\u9078\u64c7\u8a0a\u865f\u8981\u5728SCLK\u7684\u4e0a\u5347\u7de3\u6216\u662f\u4e0b\u964d\u7de3\u9032\u884c\u63a1\u6a23\u3002 CPHA=0: \u4e0a\u5347\u7de3\uff1bCPHA = 1: \u4e0b\u964d\u7de3\u3002<\/li>\n\n\n\n
    • \u6642\u8108\u6975\u6027\uff08CPOL\uff09\uff1a\u7576SPI\u5728\u9592\u7f6e\u72c0\u614b\u6642\uff0cSCLK\u7684\u96fb\u4f4d\u72c0\u614b\u3002 \uff08\u8a3b\uff1a\u9592\u7f6e\u72c0\u614b\u6307\u7684\u662fCS\u63a5\u8173\u5728\u50b3\u8f38\u958b\u59cb\u8207\u50b3\u8f38\u7d50\u675f\u6642\u7684\u72c0\u614b\uff09 CPOL = 0: \u9592\u7f6e\u6642\u4fdd\u6301\u4f4e\u96fb\u4f4d\uff1bCPOL = 1: \u9592\u7f6e\u6642\u4fdd\u6301\u9ad8\u96fb\u4f4d\u3002<\/li>\n<\/ul>\n\n\n\n

      \u6839\u64da\u76f8\u4f4d\u548c\u6975\u6027\u7684\u8b8a\u5316\uff0cSPI\u5c31\u6703\u7522\u751f4\u7a2e\u4e0d\u540c\u7684\u50b3\u8f38\u6a21\u5f0f\uff1a<\/p>\n\n\n\n

      <\/p>\n\n\n\n

      \u6a21\u5f0f<\/th>Clock Polarity (CPOL) <\/th>Clock Phase (CPHA)<\/th><\/tr><\/thead>
      MODE0<\/td>0<\/td>0<\/td><\/tr>
      MODE1<\/td>0<\/td>1<\/td><\/tr>
      MODE2<\/td>1<\/td>0<\/td><\/tr>
      MODE3<\/td>1<\/td>1<\/td><\/tr><\/tbody><\/table><\/figure>\n\n\n\n

      <\/p>\n\n\n\n

      ESP32\u7684SPI\u4ecb\u9762<\/h2>\n\n\n\n

      ESP32\u7e3d\u5171\u67094\u500bSPI\u4ecb\u9762\uff0c\u5206\u5225\u662fSPI0~SPI3\u3002SPI0 \u8207 SPI1 \u5df2\u7d93\u88ab\u7528\u4f86\u9023\u63a5\u5230\u6676\u7247\u4e0a\u7684Flash Memory\uff0c\u6211\u5011\u4e00\u822c\u53ef\u4ee5\u81ea\u7531\u4f7f\u7528\u7684\u662fSPI2\u8207SPI3\u9019\u5169\u500bSPI\u63a7\u5236\u5668\uff0c\u5176\u4e2dSPI2\u53c8\u88ab\u7a31\u4f5c HSPI\uff08High-speed Serial Peripheral Interface\uff09\uff0cSPI3\u88ab\u7a31\u4f5cVSPI\uff08Very High-speed Serial Peripheral Interface\uff09\u3002\u9019\u5169\u500b SPI Bus \u5404\u81ea\u5177\u6709\u7368\u7acb\u7684\u8a0a\u865f\uff0c\u4ee3\u8868\u6211\u5011\u53ef\u4ee5\u96a8\u610f\u5c07\u4efb\u610f\u4e00\u9805\u4f5c\u70ba\u4e3b\u8a2d\u5099\u6216\u5468\u908a\u8a2d\u5099\uff0c\u800c\u4e0d\u5f71\u97ff\u5230\u53e6\u5916\u4e00\u9805\u3002\u5728\u628a\u5b83\u5011\u7576\u4f5c\u4e3b\u8a2d\u5099\u7684\u60c5\u6cc1\u4e0b\uff0c\u55ae\u4e00\u500bSPI Bus\u6700\u591a\u53ef\u4ee5\u9a45\u52d53\u500b\u5468\u908a\u8a2d\u5099\u3002<\/p>\n\n\n\n

      HSPI \u548c VSPI Bus\u7684\u9810\u8a2d\u63a5\u8173\u5982\u4e0b\uff1a<\/p>\n\n\n\n

      \"\"<\/figure>\n\n\n\n

      \ud83d\udca1Tips:<\/span> \u5728\u67d0\u4e9bSPI\u5468\u908a\u8a2d\u5099\u7684\u8173\u4f4d\u6a19\u793a\u4e2d\uff0cCOPI \/ MOSI \u53ef\u80fd\u88ab\u6a19\u8a18\u70ba SDO \uff08Serial Data Out\uff09, CIPO \/ MISO \u53ef\u80fd\u88ab\u6a19\u8a18\u70ba SDI \uff08Serial Data In\uff09\u3002<\/p><\/blockquote><\/figure>\n\n\n\n

      <\/p>\n\n\n\n

      \u4f7f\u7528ESP32\u4e0a\u9762\u7684SPI<\/h2>\n\n\n\n

      VSPI\uff08\u9810\u8a2d\uff09<\/h3>\n\n\n\n

      \u5728\u6c92\u6709\u7279\u5225\u8a2d\u5b9a\u7684\u60c5\u6cc1\u4e0b\uff0cESP32\u7684SPI\u9810\u8a2d\u4f7f\u7528VSPI\uff08SPI3\uff09\uff0c\u56e0\u6b64\u53ea\u8981\u7167\u8457\u9810\u8a2d\u63a5\u8173\u9023\u63a5\u5373\u53ef\u3002<\/p>\n\n\n\n

      \u6211\u5011\u53ef\u4ee5\u57f7\u884c\u4e0b\u9762\u7684\u7bc4\u4f8b\u67e5\u770b\u958b\u767c\u677f\u7684\u9810\u8a2d\u63a5\u8173\uff1a<\/p>\n\n\n\n

      \/* \u986f\u793aESP32 SPI\u9810\u8a2d\u63a5\u8173 *\/\n\nvoid setup() {\n  Serial.begin(115200);\n}\n\nvoid loop() {\n  Serial.print(\"COPI \/ MOSI: \");\n  Serial.println(MOSI);\n  Serial.print(\"CIPO \/ MISO: \");\n  Serial.println(MISO);\n  Serial.print(\"SCK: \");\n  Serial.println(SCK);\n  Serial.print(\"CS \/ SS: \");\n  Serial.println(SS);\n  delay(1000);\n  Serial.println();\n}<\/code><\/pre>\n\n\n\n
      \u57f7\u884c\u7d50\u679c<\/span><\/p>\n\n\n\n
      \"\"<\/figure>\n\n\n\n
      <\/p>\n\n\n\n
      HSPI<\/h3>\n\n\n\n
      \u5982\u679c\u8981\u4f7f\u7528HSPI\uff0c\u5c31\u8981\u5148\u5f15\u5165<SPI.h>\u9019\u500b\u6a19\u982d\u6a94\uff0c\u7136\u5f8c\u7528SPIClass\u51fd\u5f0f\u5be6\u4f8b\u5316\u7269\u4ef6\uff0c\u4e26\u6307\u5b9a\u4f7f\u7528HSPI\u3002<\/p>\n\n\n\n
      \u4f8b\u5982\uff1a<\/p>\n\n\n\n
      # include <SPI.h>\n\nSPIClass MySPI2(HSPI);  \/\/ \u6307\u5b9aMySPI2\u4f7f\u7528HSPI\n\nvoid setup() {\n\n  MySPI2.begin();       \/\/ \u521d\u59cb\u5316MySPI2\uff0c\u4f7f\u7528HSPI\u9810\u8a2d\u63a5\u8173 (SCLK = 14, CIPO= 12, COPI =13, CS = 15)\n  \n\t\/\/ \u4ee5\u4e0b\u7701\u7565...\n}\n\nvoid loop() {\n  \n}<\/code><\/pre>\n\n\n\n
      \u81ea\u8a02\u7fa9SPI\u63a5\u8173<\/h3>\n\n\n\n
      SPIClass\u7684begin\u51fd\u5f0f\u4e5f\u53ef\u4ee5\u7528\u4f86\u6307\u5b9a\u5176\u4ed6GPIO\u63a5\u8173\uff1a<\/p>\n\n\n
      MySPI2.begin(HSPI_SCLK, HSPI_CIPO, HSPI_COPI, HSPI_CS); \/\/SCLK, CIPO, COPI, CS Pin<\/p>\n\n\n\n
      \u4f8b\u5982\u50cf\u662f\uff1a<\/p>\n\n\n\n
      # include <SPI.h>\n\n\/\/ \u63a5\u8173\u5b9a\u7fa9\n# define MySPI2_SCLK 14\n# define MySPI2_CIPO 12\n# define MySPI2_COPI 13\n# define MySPI2_CS 15\n\n# define SPI2CLK 1000000  \/\/ 1M Hz\n\nSPIClass MySPI2(HSPI);\n\nvoid setup() {\n  MySPI2.begin(MySPI2_SCLK, MySPI2_CIPO, MySPI2_COPI, MySPI2_CS);  \/\/ \u5728begin()\u81ea\u5b9a\u7fa9SPI2\u7684\u63a5\u8173\n}\n\nvoid loop() {\n  \n}<\/code><\/pre>\n\n\n\n
      \ud83d\udca1Tips: \u7576SPI\u88dd\u7f6e\u9700\u8981\u9ad8\u901f\u901a\u8a0a\u6642\uff0c\u5efa\u8b70\u4f7f\u7528\u9810\u8a2d\u63a5\u8173\u3002<\/p><\/blockquote><\/figure>\n\n\n\n
      <\/p>\n\n\n\n
      <\/p>\n\n\n\n
      SPI\u50b3\u8f38\u6d41\u7a0b<\/h2>\n\n\n\n
      \u9996\u5148\uff0c\u8a2d\u5b9a\u597dSPI\u7684\u6642\u8108\u983b\u7387\u4ee5\u53ca\u50b3\u8f38\u6a21\u5f0f\uff0c\u7136\u5f8c\u4f7f\u7528beginTransaction\u521d\u59cb\u5316SPI\u4ecb\u9762\u3002<\/p>\n\n\n
      SPI.beginTransaction(SPISettings(1000000, MSBFIRST, SPI_MODE0)); \/\/ \u6642\u81081MHz, MSBFIRST, MODE0<\/p>\n\n\n\n
      \u63a5\u8457\u7528CS\u63a5\u8173\u9078\u64c7\u8981\u50b3\u9001\u7684\u5468\u908a\u8a2d\u5099\uff0c\u5c07\u96fb\u58d3\u6e96\u4f4d\u62c9\u4f4e\uff0c\u555f\u7528\u8a2d\u5099\u3002<\/p>\n\n\n
      digitalWrite(CS_pin, LOW);<\/p>\n\n\n\n
      \u7136\u5f8c\u547c\u53ebtransfer()\u65b9\u6cd5\u50b3\u8f38\u8cc7\u6599\u3002<\/p>\n\n\n
      SPI.transfer(data);<\/p>\n\n\n\n
      \u50b3\u8f38\u5b8c\u6210\u5f8c\uff0c\u518d\u5c07CS\u63a5\u8173\u7684\u96fb\u58d3\u6e96\u4f4d\u62c9\u56de\u9ad8\u96fb\u4f4d\u3002<\/p>\n\n\n
      digitalWrite(CS_pin, HIGH);<\/p>\n\n\n\n
      \u6700\u5f8c\uff0c\u547c\u53ebendTransaction()\uff0c\u91cb\u653e\u76ee\u524d\u4f7f\u7528\u7684SPI Bus\u3002<\/p>\n\n\n
      SPI.endTransaction();<\/p>\n\n\n\n
      <\/p>\n\n\n\n
      SPI\u8a0a\u865f\u7684\u5be6\u969b\u8f38\u51fa<\/h2>\n\n\n\n
      \u4e0b\u5716\u662f\u6307\u5b9aESP32\u7576\u4f5cSPI Controller\u8f38\u51fa 0b11001100<\/em><\/strong><\/code> \u7684\u8a0a\u865f\uff0c\u7528\u908f\u8f2f\u5206\u6790\u5100\u6355\u6349\u5230\u7684\u6ce2\u5f62\uff1a<\/p>\n\n\n\n
      \"\"<\/figure>\n\n\n\n
      \u9019\u6bb5\u901a\u8a0a\u7684\u50b3\u8f38\u6a21\u5f0f\u662fMODE 0\uff0c\u6240\u4ee5\u5f9e\u5716\u7247\u4e2d\u53ef\u4ee5\u770b\u5230\uff0c\u5728\u6bcf\u500b\u6642\u8108\u7684\u4e0a\u5347\u7de3\u8b80\u53d6\uff0cMOSI\u63a5\u8173\u5c31\u6703\u63a5\u6536\u5230 0b11001100<\/em><\/strong> \u7684\u8cc7\u6599\u3002\u4f46\u662f\u5728\u8a66\u4e86\u5e7e\u6b21\u5f8c\u90fd\u6c92\u80fd\u6293\u5230CS\u63a5\u8173\u7684\u8b8a\u5316\u72c0\u614b\uff0c\u4e14CS\u51fa\u73fe\u7684\u5e7e\u500b\u5c16\u6ce2\uff0c\u4e5f\u8b93\u7b46\u8005\u76f8\u7576\u4e0d\u89e3\u3002\u5982\u679c\u6709\u7db2\u53cb\u77e5\u9053\u539f\u56e0\uff0c\u9084\u8acb\u4e0d\u541d\u544a\u77e5\u3002<\/p>\n\n\n\n
      <\/p>\n\n\n\n
      \u6e2c\u8a66\u7a0b\u5f0f\u78bc<\/p>\n\n\n\n